Design Verification Engineer

This is a fully remote position, open to applicants in India.

📋 Description

• Develop and implement verification test plans for IPs, subsystems, and SoC components.

• Create and manage verification environments based on SystemVerilog/UVM.

• Write directed and constrained-random test cases to ensure design functionality is validated.

• Develop functional coverage models and support coverage closure efforts.

• Troubleshoot simulation failures and work collaboratively with design engineers to resolve issues.

• Write assertions (SVA) to enhance design verification and checking quality.

• Engage in regression execution, analyze results, and report findings.

• Assist with IP integration and verification at the subsystem level.

• Learn and implement industry-standard verification methodologies and best practices.

• Contribute to the creation of automation scripts aimed at improving regression, reporting, and verification efficiency.

• Collaborate closely with Design, Architecture, and Software teams to understand requirements and verify functionality.

⛳️ Requirements

• Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline.

• Over 5 years of experience in Design Verification or Digital Design.

• Strong comprehension of digital design principles and computer architecture.

• Proficiency in Verilog/SystemVerilog.

• Familiarity with UVM methodology.

• Understanding of simulation and debugging concepts.

• Knowledge of functional and code coverage.

• Basic scripting skills in Python, Perl, Shell, or TCL.

• Experience with verification tools from Synopsys, Cadence, or Siemens EDA.

• Strong analytical and debugging skills.

• Understanding of common bus protocols such as AXI, APB, AHB, PCIe, or Ethernet is an advantage.

• Preferred internship or academic project experience in ASIC/SoC verification.

• Experience with SystemVerilog assertions (SVA) is a plus.

• Familiarity with constrained-random verification techniques is preferred.

• Experience with Python-based automation is advantageous.

• Understanding of AI, HPC, or Networking architectures is a bonus.

• Familiarity with Git or other version-control systems is preferred.

• Strong communication and teamwork skills.

🏝️ Benefits

• Remote-friendly work arrangement.

• Opportunity to collaborate with a global team.

• Chance to work on advanced SoCs and IPs for AI, HPC, and Networking.

• Opportunity to contribute to next-generation semiconductor technologies.

• Work alongside experienced verification engineers and architects.

• Engage with impactful silicon infrastructure projects for AI.

• Backed by strategic investors, with committed capital and a clear revenue path.