Analog Layout Engineer

This is a fully remote position, open to applicants in Ukraine.

📋 Description

• Design analog layouts for amplifiers, references, bias blocks, and data converters utilizing FinFET nodes.

• Utilize best practices for DRC/LVS closure, incorporating advanced debugging methods.

• Conduct EM/IR analysis and implement layout modifications to achieve reliability objectives.

• Mitigate parasitic effects through strategic routing, shielding, and post-extraction adjustments.

• Apply matching techniques such as common-centroid, interdigitation, and dummy devices.

• Work collaboratively with circuit designers to enhance layout for performance and yield.

• Guarantee adherence to color-aware routing and multi-patterning restrictions (SADP/SAQP).

⛳️ Requirements

• Demonstrated experience in FinFET layout design for analog intellectual property.

• In-depth understanding of LDE effects (WPE, STI, LOD) and their corresponding mitigation techniques.

• Expertise in using industry-standard EDA tools (Cadence Virtuoso, Calibre, PVS).

• Familiarity with parasitic extraction processes and correlation methods.

• Knowledge of reliability mechanisms (BTI, HCI) and guard-banding strategies in layout design.

• Experience with advanced-node design regulations and color-aware layout practices.

• Understanding of EM/IR verification techniques and sign-off procedures.

• Capability to automate layout tasks through SKILL or Python scripting.

🏝️ Benefits

• Comprehensive health insurance from the first day, irrespective of the probationary period.

• Christmas holidays spanning from December 25 to December 31.

• Collaboration with Superhumans center and Veteran HUB.

• Access to psychological counseling services provided by the Veteran Hub.

• Internal policies ensuring a supportive environment for military personnel and veterans.