This is a fully remote position, open to applicants in United States, +2 more locations.

📋 Description

• Enhance software workloads on advanced RISC-V platforms.

• Engage with contemporary datacenter and agentic AI workloads, encompassing Java, Python, PHP, Node.js, Lua, Go, and Rust.

• Recognize performance limitations and create software, compiler, runtime, and hardware-aware enhancements.

• Elevate throughput, latency, and overall efficiency.

• Initiate and fine-tune key runtimes.

• Analyze real-world applications and examine memory and concurrency behaviors.

• Investigate optimizations utilizing RISC-V Vector/Matrix functionalities and custom instructions.

• Employ AI-assisted development and automated optimization processes.

• Collaborate with teams across compilers, runtime, systems software, hardware, and performance modeling.

• Shape the RISC-V software ecosystem and the future architecture of Tenstorrent CPUs.

⛳️ Requirements

• Master’s or PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related discipline, with substantial experience in performance optimization, computer architecture, compilers, or systems software.

• Practical experience in runtime or compiler optimization, including but not limited to OpenJDK/JIT, LLVM, GCC, V8, Python, or similar systems.

• Comprehensive understanding of CPU performance, memory hierarchies, concurrency, garbage collection, vector/SIMD optimization, and the RISC-V architecture.

• Proficiency with performance profiling and analysis tools such as Linux perf, runtime profilers, QEMU, tracing tools, and performance modeling environments.

• Strong programming capabilities in Java, Python, C/C++, and RISC-V assembly.

• Practical experience in optimizing software on RISC-V or another contemporary CPU architecture.

• Eligibility to access U.S. export-controlled technology, in adherence to applicable U.S. export laws, including potential citizenship, permanent residency, or prior license approval requirements.