
ASIC Design Verification Engineer
Posted 19 hours ago

Posted 19 hours ago
This is a fully remote position, open to applicants in United States.
• Develop and implement test plans for RTL designs utilizing SystemVerilog and UVM.
• Create and sustain testbenches, test cases, and test vectors.
• Contribute to the creation of innovative methodologies and verification techniques.
• Lead technical projects while mentoring junior team members and contractors.
• Collaborate with third-party vendors to ensure compliance with verification quality delivery milestones.
• Conduct simulations to validate designs against specifications.
• Analyze simulation results, identify problems, and debug designs alongside the RTL team.
• Implement coverage tracking and performance metrics.
• Document plans, environments, test cases, and all results to maintain a comprehensive record of verification strategies.
• Work with a compact in-house engineering team as well as global contractors and vendors.
• Bachelor’s degree in Electrical or Computer Engineering, Computer Science, or a related field.
• At least 8 years of hands-on experience in SoC verification using UVM.
• Experience in gate level simulation setup and process corner failure analysis.
• Proficiency in Cadence verification tools such as Xcelium, Simvision, and Jasper.
• Experience in writing and debugging RTL with SystemVerilog.
• Competence in analyzing code and functional coverage to enhance testing for corner cases.
• Programming skills in C, C++, and/or Python/Perl.
• Familiarity with digital design concepts and the ASIC development process.
• Strong analytical and problem-solving capabilities.
• Ability to handle multiple tasks and prioritize effectively in a fast-paced environment; managing several complex, multidisciplinary tasks and projects.
• Capacity to collaborate across teams and communicate effectively.
• Keen attention to detail and a strong focus on accuracy.
• Eagerness to learn and acquire new skills.
• Experience in verifying RISC-V based systems.
• Familiarity with verifying high-speed interfaces such as PCIe and DDR.
• Experience with version control systems (e.g., Git) and Continuous Integration/Continuous Deployment (CI/CD) pipelines.
• Background in emulation or FPGA prototyping.
• Knowledge of formal verification methodologies.
• Familiarity with the Chisel hardware description language.
• Competitive salaries adjusted according to experience.
• Employer-covered health care.
• Employer contributions to health savings accounts.
• Flexible time off policies.
• Flexible work locations with remote work options available.
• 401K employer matching.
A Thinking Ape
Studio Wildcard
Full Sail University User Experience Lab
AECOM
Get handpicked remote jobs straight to your inbox weekly.