
Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Posted 22 hours ago

Posted 22 hours ago
This is a fully remote position, open to applicants in California, +3 more states.
• Implement practical AI workflows to assist with debugging, manage triage, perform summarization, create documentation, and automate workflows.
• Develop and enhance high-speed IO integration, along with build, simulation, and pre-submit qualification processes for extensive ASIC IP development.
• Enhance CI reliability, reduce turnaround time, improve debuggability, and increase scalability across distributed compute environments.
• Diagnose complex failures across development, verification, build systems, tools, infrastructure, and compute environments.
• Transform recurring integration or qualification challenges into sustainable automation and process enhancements.
• Establish, publish, and utilize metrics for integration latency, flow health, failure trends, and engineering efficiency.
• Leverage metrics to prioritize tasks, predict risks, and optimize operational systems.
• Collaborate effectively with ASIC designers, verification engineers, firmware engineers, methodology teams, and infrastructure partners.
• Explore unfamiliar technical domains, comprehend systems end-to-end, and resolve ambiguous issues.
• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Over 5 years of pertinent industry experience.
• In-depth understanding of ASIC development workflows, including builds, simulation, regressions, debugging, integration, and qualification.
• Familiarity with verification methodologies such as UVM or comparable systems.
• Proficient in Verilog/SystemVerilog, with experience in RTL development or pre-silicon verification/debugging.
• Exposure to simulation and debugging tools like VCS, Verdi, Xcelium, or their equivalents.
• Strong programming capabilities in Python, Perl, or another scripting/systems programming language.
• Experience with SystemVerilog and object-oriented verification environments.
• Excellent root-cause analysis skills, particularly for intermittent or challenging infrastructure failures.
• Capability to independently explore ambiguously defined technical problems across various domains and deliver effective solutions.
• Enthusiasm for infrastructure, automation, and efficiency improvements.
• A curiosity for build, verification, tooling, and infrastructure systems.
• Practical experience utilizing AI tools in engineering workflows.
• Experience in defining and employing engineering metrics.
• Background in providing ASIC IP for multiple products, projects, or SoCs concurrently.
• Equity
• Comprehensive benefits
• Access to cutting-edge AI efficiency tools
• A welcoming and supportive work environment
Turner & Townsend
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Commonwealth Associates, Inc.
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