Lead / Principal Engineer, Ethernet Scale - Up

This is a fully remote position, open to applicants in India.

📋 Description

• Establish the architecture for Ethernet-based AI scale-up interconnects and accelerator fabrics.

• Oversee the development of high-performance Ethernet subsystem microarchitectures, which encompass RDMA, packet processing, network offload, traffic management, congestion control, and reliability mechanisms.

• Drive the execution process from architecture through RTL, verification, physical design, silicon bring-up, and production.

• Enhance performance, latency, scalability, power efficiency, and reliability for demanding AI and HPC workloads.

• Collaborate with hardware, firmware, software, and system teams to provide AI networking solutions.

• Act as a technical leader within the company, influencing product strategy, roadmap, and architectural direction.

• Define and validate Ethernet Scale-Up Networking architecture for the next generation of HPC and rack-scale AI systems.

• Deliver production-quality Ethernet subsystem microarchitecture within established timelines.

• Coordinate and facilitate cross-functional teams across hardware, firmware, software, and systems.

⛳️ Requirements

• Over 15 years of experience in ASIC/SoC architecture and design.

• Demonstrated success in delivering networking, NIC, switch, DPU, accelerator interconnect, or high-speed connectivity silicon.

• Extensive expertise in SystemVerilog/RTL design and high-performance datapath architecture.

• Strong understanding of Ethernet, RDMA, traffic management, congestion control, and scalable fabric architectures.

• Experience throughout the full ASIC lifecycle, from architecture to production silicon.

• Familiarity with Ultra Ethernet, UALink, RoCEv2, InfiniBand, PCIe Gen6/Gen7, UCIe, CXL, AI/HPC interconnects, and collective communication acceleration.

• Experience with 400G/800G/1.6T Ethernet systems.

• Knowledge of high-speed SerDes and advanced networking architectures.

🏝️ Benefits

• Flexible remote work arrangement.

• Opportunity to collaborate with a global team.

• Chance to engage in impactful AI/HPC silicon infrastructure projects.

• Responsibility for shaping the technical roadmap and architectural direction.

• High-impact position with influence across the company’s technical landscape.