Front End Design Verification Engineer

This is a fully remote position, open to applicants in California.

📋 Description

• Validate the fetch unit for next-generation, high-performance RISC-V CPU cores

• Create verification strategies and advanced testing methodologies

• Troubleshoot complex failures and guarantee front-end accuracy across various workloads and edge cases

• Work closely with CPU architects, RTL designers, and fellow design verification engineers

• Confirm the functionality of instruction fetch, prediction, decode, and dispatch mechanisms

• Validate speculative execution alongside edge cases related to branches, redirects, exceptions, and pipeline flushes

• Convert architectural specifications and microarchitectural designs into RTL and thorough verification environments

• Assist in the development of processors tailored for AI, HPC, and high-performance computing workloads

⛳️ Requirements

• Over 6 years of experience in design verification for CPUs, SoCs, ASICs, or other intricate digital designs

• Extensive knowledge of SystemVerilog and UVM, encompassing constrained-random testing, assertions, functional coverage, and testbench creation

• Strong comprehension of CPU architecture, including pipelines, instruction fetch/decode processes, branch prediction, speculative execution, and out-of-order execution

• Experience in debugging RTL and simulation failures through waveforms and standard simulation/debugging tools

• Proficient programming skills in C/C++ and/or Python

• Capable of effective collaboration across architecture, RTL, DV, and software teams

• Must be eligible to access U.S. export-controlled technology, complying with relevant export regulations and potential citizenship/permanent residency or licensing requirements

🏝️ Benefits

• Highly competitive compensation package and benefits