Senior Engineer, Layout Design

This is a fully remote position, open to applicants in Germany.

📋 Description

• Lead high-level chip planning and execute functional-block-level, block-level, sub-block level, leaf cell, and standard cell custom layouts for CMOS and BiCMOS circuits.

• Execute schematic-driven layout designs while adhering to design constraints.

• Create die-area efficient layouts that meet the requirements set by circuit designers.

• Conduct block or top-level layout designs as necessary.

• Carry out floor planning, power line planning, shielding, and device-matching layout tasks.

• Verify layouts, ensuring compliance with DRC, LVS, and ERC standards.

• Contribute to various chip-level routing and layout requirements.

• Perform chip-level integration, verification, and tape-out processes.

• Provide support for additional projects as directed by management.

• Mentor junior layout engineers and offshore layout contractors.

• Assist in the development of common best practices and workflows across all locations.

• Contribute to the establishment of processes and procedures that ensure high layout quality.

⛳️ Requirements

• BA/BS Degree in Layout Design or a related field, or equivalent experience.

• A minimum of 10 years of experience in layout design for analog and full-custom digital blocks.

• Proficient in utilizing layout editing tools within the Cadence Virtuoso design environment.

• Strong working knowledge of debugging DRC, LVS, and ERC using Cadence PVS or Mentor Calibre.

• Conceptual understanding of layout-related topics such as parasitics, matching, crosstalk, transistor layout dependent effects, latch-up, IR drop, electro migration (EM), and deep N-well and NTN isolation.

• Excellent problem-solving skills related to device matching, electro-migration, signal integrity, and power distribution while adhering to area constraints.

• Experience in chip-level floor planning and analog block integration.

• Proven experience in chip-level integration, verification, and tape-out processes.

• Ability to employ productivity-enhancing tools and design scripts for task automation is preferred.

• Detail-oriented, organized, accurate, and capable of producing efficient layout techniques.

🏝️ Benefits

• Quarterly bonus linked to the achievement of innovation goals.

• Equity grants.