RTL Design Engineer

This is a fully remote position, open to applicants in United States.

📋 Description

• Take charge of micro-architecture definition based on high-level functional specifications.

• Create and execute RTL for intricate digital blocks utilizing SystemVerilog/Verilog.

• Lead the development of digital block control logic and IP integration efforts.

• Engage in discussions related to subsystem-level architecture alignment.

• Assist in design sign-off processes, which include CDC, RDC, lint, and readiness checks for synthesis.

• Work closely with Design Verification (DV) teams to achieve closure and facilitate debugging.

• Assume complete responsibility for the project lifecycle with minimal oversight.

⛳️ Requirements

• Extensive and up-to-date knowledge in RTL design using SystemVerilog and/or Verilog.

• Proven capability to autonomously define micro-architecture from functional specifications.

• Recent practical experience in designing custom RTL blocks, such as controllers, DMAs, or SoC bus bridges.

• Strong understanding of memory controllers, including HBM, DDR4, or DDR5.

• Experience in SoC integration and the design of digital subsystems.

• Expertise in IP integration and block-level ownership.

• Familiarity with sign-off processes, including CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing).

• Background in designing IPs across multiple clock domains.

• Capability to work independently without requiring ramp-up time.

🏝️ Benefits

• Competitive salary and performance-based incentives.

• Comprehensive health, dental, and vision insurance.

• Opportunities for professional development and career advancement.

• Flexible working hours and remote work options.

• Engaging and collaborative work environment.