
Principal Analog Design Engineer
Posted 1 day ago

Posted 1 day ago
This is a fully remote position, open to applicants in United States.
β’ Take charge of the complete analog block development process, which includes defining requirements, creating architecture, designing at the transistor level, simulating, and obtaining signoff.
β’ Design and enhance analog/mixed-signal circuits, such as amplifiers, references, biasing circuits, regulators, comparators, oscillators/clocking, data converters, and sensor/AFE front ends.
β’ Drive performance across PVT corners, handle mismatch/Monte Carlo analysis, consider aging/reliability factors, and account for realistic loading or interactions with adjacent blocks.
β’ Collaborate with layout teams on floorplanning, matching and guarding strategies, design that is aware of parasitics, and ensure post-layout closure using PEX.
β’ Create and maintain test benches, modeling collateral, and documentation for verification and integration purposes.
β’ Assist with silicon bring-up and debugging by correlating lab data with simulations, identifying root causes of issues, and implementing design fixes or Engineering Change Orders (ECOs).
β’ Work alongside digital, firmware, DFT, validation, and product engineering teams to guarantee system-level success.
β’ Enhance design methodologies through reusable circuits, checklists, signoff processes, and scalable best practices.
β’ Deliver analog blocks that meet specifications with margins across PVT, mismatch, and post-layout effects.
β’ Facilitate effective design reviews, expedite silicon bring-up, ensure efficient cross-functional execution, and reduce cycle times.
β’ Minimum of 5 years of experience in analog or mixed-signal IC design.
β’ Strong foundation in analog circuit design, device physics, noise management, stability/compensation, and feedback systems.
β’ Competence with industry-standard EDA tools and simulation workflows, including Spectre/HSPICE, ADE, and waveform/debugging tools.
β’ Experience in closing designs that account for post-layout parasitics and across various process/voltage/temperature corners.
β’ Ability to convert ambiguous system requirements into clear block specifications and actionable design plans.
β’ Strong debugging capabilities and comfort working with lab/validation teams to correlate silicon data with simulations.
β’ Excellent communication skills and a strong sense of ownership in cross-site, cross-functional settings.
β’ Experience in high-speed or precision analog, based on product requirements.
β’ Background in power management, encompassing LDOs, bandgaps, references, protection mechanisms, start-up sequences, and transient responses.
β’ Experience with ADC/DAC and power-related analog applications.
β’ Familiarity with reliability/ESD considerations and design-for-manufacturability practices.
β’ Experience in supporting production ramping, including yield learning, characterization, and test correlation.
β’ Flexible remote work arrangement.
β’ Opportunity to collaborate with a global team.
β’ Chance to work on significant AI/HPC semiconductor infrastructure.
β’ Autonomy and ownership in shaping the roadmap.
β’ Work with paying customers, committed capital, and strategic investors.
β’ Opportunity to design and deliver real silicon products.
β’ Collaborative work environment with minimal bureaucracy.
WBS Training
Milengo
Milengo
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