Hardware Engineer – RTL Implementation, Evaluation Workflows

This is a fully remote position, open to applicants in United States.

📋 Description

• Engage in a remote interview focused on standard hardware design processes

• Navigate through RTL implementation and hardware description methodologies

• Assess and respond to automated evaluation scenarios

• Showcase hardware description workflows via screen sharing

• Explain a recent intricate hardware verification issue

• Offer insights on existing workflows and identify tooling deficiencies

• Discuss obstacles related to current verification tools

⛳️ Requirements

• Skilled hardware engineer with expertise in RTL design and implementation

• Professional background in hardware engineering or RTL design

• Practical experience with hardware description languages (Verilog, VHDL, or SystemVerilog)

• Knowledge of automated evaluation and verification processes

• Able to articulate technical design decisions during a remote interview

• Welcoming ASIC designers, FPGA engineers, hardware verification experts, and system-on-chip (SoC) architects

• Must reside within the United States

🏝️ Benefits

• Compensation of $147 per hour for study/interview participation

• Opportunity to participate in remote interviews

• Interview link provided within minutes of application submission