
CPU Design Methodology Engineer
Posted Jul 18

Posted Jul 18
This is a fully remote position, open to applicants in Arizona, +3 more states.
β’ Establish and refine methodologies and tools at the system level to efficiently and scalably develop SOCs.
β’ Recognize inefficiencies and opportunities for improvement in the front-end chip implementation process, and suggest solutions to address them.
β’ Take responsibility for front-end design quality assessments and reviews, ensuring the physical design team receives high-quality RTL.
β’ A Master's degree in Computer or Electrical Engineering or equivalent experience.
β’ Over 5 years of experience in chip design, with a focus on SOC integration and design automation.
β’ Strong analytical and problem-solving abilities.
β’ Proficiency in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation.
β’ Solid coding skills in Perl, Python, or other widely-used scripting languages.
β’ Familiarity with synthesis and physical design is advantageous.
β’ Strong interpersonal skills.
β’ Competitive salaries.
β’ Generous benefits package.
Brown and Caldwell
Virtuous
Assembled Products Corporation
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