ASIC Design Engineer

This is a fully remote position, open to applicants in Costa Rica.

📋 Description

• Develop sophisticated Ethernet protocols for next-generation Ethernet ASICs

• Draft microarchitecture specifications

• Establish timing constraints for RTL blocks and collaborate with Physical Design engineers on timing optimization

• Partner with verification engineers to formulate block- and system-level test plans, ensuring sufficient design coverage

• Collaborate with hardware, firmware, and software engineers to address post-silicon ASIC challenges

⛳️ Requirements

• Bachelor's or Master's degree in Computer or Electrical Engineering

• Over 3 years of post-academic experience in digital design

• Expertise in Verilog and SystemVerilog

• Relevant background in timing closure

• Knowledge of contemporary physical design methodologies

• Proven ability in system-level debugging and identifying root causes of technical problems

• Excellent verbal and written communication skills

• Preferred: Familiarity with Ethernet architecture and networking protocols

• Preferred: Experience in designing Ethernet protocols for Ethernet adapters and switches

• Preferred: Experience with multi-clock designs and asynchronous interfaces

🏝️ Benefits

• Performance incentives

• Equity participation

• Additional benefits based on geographic location

• Paid holidays influenced by geographic location

• Flexible work arrangements depending on geographic location