
Analog Design Engineer
Posted 4 days ago

Posted 4 days ago
This is a fully remote position, open to applicants in India.
β’ Create designs for voltage regulators, encompassing high-efficiency power stages, error amplifiers, current sensing, adaptive load-line circuits, fast transient compensation, protection, and telemetry.
β’ Model mixed-signal subsystems, which include regulator control loops, power delivery networks, and DVFS subsystems to inform architectural and design decisions.
β’ Drive collaboration with SIPI/PI and packaging teams to jointly optimize voltage regulators and power delivery systems.
β’ Validate analog blocks across PVT, mismatch, and post-layout impacts.
β’ Facilitate comprehensive design reviews that address requirements, trade-offs, and associated risks.
β’ Assist with silicon bring-up using correlation, structured debugging, and effective resolutions.
β’ Collaborate with layout, verification, testing, and validation teams through well-defined interfaces and thorough documentation.
β’ Create reusable design assets and enhance methodologies to decrease cycle time and boost first-pass success rates.
β’ A minimum of 8 years of practical experience in analog/mixed-signal IC design.
β’ A strong emphasis on high-current, high-efficiency power management, which includes PMIC, IVR, and DC-DC converters.
β’ Profound knowledge of voltage regulator architectures and control loops capable of delivering substantial current at high switching frequencies.
β’ Direct experience with magnetics integration for high-density IVR, such as inductor modeling, coupling effects, EMI/thermal co-optimization, and 3DIC package integration.
β’ Expertise in Cadence Virtuoso, Spectre, Clarity/EMX, and MATLAB/Simulink.
β’ Familiarity with 2.5D packaging processes and co-design with SIPI/PDN teams.
β’ A BS, MS, or PhD in Electrical Engineering with a specialization in analog and mixed-signal systems.
β’ Experience in designing switching regulators, including Buck, Boost, Buck-Boost, LDO, and other PMIC components.
β’ A solid foundation in LDOs, bandgap references, voltage/current references, protective circuits, start-up circuits, transient response optimization, and related analog power-management functions.
β’ Knowledge of advanced packaging processes and thermal/PI co-optimization.
β’ A collaborative team player with outstanding communication abilities.
β’ Flexible work arrangement that supports remote work.
β’ Opportunity to collaborate with a global team.
β’ Engage in impactful AI/HPC silicon infrastructure projects.
β’ Responsibility for shaping the roadmap and technical direction.
β’ Backed by paying customers, committed capital, and strategic investors.
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