W2 RTL Design Engineer

This is a fully remote position, open to applicants in United States.

📋 Description

• Take charge of defining micro-architecture based on high-level functional specifications.

• Create and implement RTL for intricate digital blocks utilizing SystemVerilog/Verilog.

• Lead the control logic development for digital blocks along with IP integration.

• Engage in discussions regarding subsystem-level architecture alignment.

• Assist in design sign-off processes, including CDC, RDC, lint, and synthesis readiness evaluations.

• Work closely with Design Verification (DV) teams to achieve closure and troubleshoot issues.

• Assume complete ownership of the project lifecycle with minimal oversight.

⛳️ Requirements

• Extensive, up-to-date knowledge in RTL design utilizing SystemVerilog and/or Verilog.

• Proven capability to autonomously define micro-architecture based on functional specifications.

• Recent practical experience in designing custom RTL blocks like controllers, DMAs, or SoC bus bridges.

• Strong grasp of memory controllers, encompassing HBM, DDR4, or DDR5.

• Familiarity with SoC integration and digital subsystem design.

• Expertise in IP integration and block-level ownership.

• Understanding of sign-off processes, including CDC (Clock Domain Crossing) and RDC (Reset Domain Crossing).

• Experience in designing IPs with multiple clock domains.

• Ability to work independently without requiring ramp-up time.

🏝️ Benefits

• Remote Contracted

• 12-month contract engagement