Senior SoC Subsystem and I/O Architect

This is a fully remote position, open to applicants in Massachusetts, +1 more state.

📋 Description

• Define high-level architecture for SoC subsystems related to LPU products.

• Transform LPU product requirements into architectural specifications for subsystems including uncore, IO, memory, firmware-facing components, boot, reset, safety, fault tolerance, diagnostics, and power regulation.

• Work closely with IP teams to create detailed build documents for PCIe/CXL, NVLink/NVLink-C2C, UCIe, AXI/CHI, NoC fabrics, memory controllers, coherency blocks, MMUs/IOMMUs, boot, reset, and related SoC infrastructure.

• Define subsystem behavior that includes enumeration, capability discovery, configuration flows, sequence control of memory operations, data consistency, address mapping, interrupt handling, virtualization, error handling, and controls visible to firmware/software.

• Develop or guide the creation of functional and architectural models based on specifications, utilizing C++, SystemC, Python, or similar programming languages.

• Employ models to validate architectural intent, subsystem behavior, configuration sequences, and IP interactions prior to the availability of RTL or silicon.

• Manage trade-offs involving bandwidth, latency, power, area, timing, scalability, reliability, security, debuggability, and software usability.

• Review specifications for IP, subsystem architecture documents, model behavior, verification plans, and validation strategies.

• Collaborate with architecture, IP, firmware, software, RTL, verification, platform, and post-silicon teams to ensure the implementation of architectural decisions.

⛳️ Requirements

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

• Over 8 years of demonstrated experience in SoC architecture, subsystem architecture, IO architecture, interconnect architecture, GPU/CPU architecture, accelerator architecture, or high-performance systems.

• Strong knowledge of SoC architecture and development of uncore subsystems.

• In-depth understanding of IO and interconnect cores, including PCIe, CXL, NVLink, NVLink-C2C, UCIe, AXI, CHI, or NoC fabrics.

• Experience transitioning from product requirements to architectural needs and IP/subsystem specifications.

• Expertise in creating functional models, architectural models, golden models, or C/SystemC models derived from architectural specifications.

• Strong understanding of memory ordering, coherency, address translation, interrupts, virtualization, MMUs/IOMMUs, enumeration, configuration, and error management.

• Comprehensive knowledge of boot, reset, firmware handoff, capability discovery, security, RAS, debugging, and power management architecture.

• Excellent communication skills and the ability to align architectural decisions across IP, firmware, software, verification, and product teams.

🏝️ Benefits

• Competitive salaries.

• Equity opportunities.

• Comprehensive benefits package.

• Opportunities for professional development.

• Flexible working arrangements.