Senior ASIC Package Design Engineer

This is a fully remote position, open to applicants in United States.

📋 Description

• Execute sophisticated ASIC package architecture with a primary emphasis on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions.

• Provide comprehensive support for package strategy regarding high-performance mixed-signal and digital SoCs, from the initial architectural phase and trade studies through vendor collaboration, qualification, and production scaling.

• Specify ASIC package architecture for FC-BGA and MCM solutions, encompassing substrate stack-up, ball-map strategy, power distribution, signal breakout, and mechanical constraints.

• Guide package-level trade studies focusing on cost, performance, power integrity, signal integrity, thermal management, manufacturability, and reliability.

• Develop package design standards, methodologies, and best practices.

• Oversee detailed design of FC-BGA packages for high-pin-count ASICs featuring high-speed SerDes, dense power grids, and RF signal content.

• Define and evaluate substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning.

• Collaborate with silicon, RF, and systems teams to optimize die floorplans and package interfaces.

• Assist in the package-level SI/PI strategy, which includes high-speed digital interfaces, power delivery network design, and decoupling strategies.

• Lead the package-level thermal architecture, which involves lid selection, TIMs, heat spreaders, and mechanical interfaces for system cooling.

• Cultivate relationships with external packaging vendors, substrate suppliers, and OSATs.

• Propel material selection, substrate technology decisions, and assembly process enhancements.

⛳️ Requirements

• Bachelor's degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related discipline.

• Over 5 years of experience in ASIC package design, with substantial expertise in FC-BGA.

• Demonstrated success in delivering high-pin-count, high-performance ASIC packages into production.

• Deep understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs.

• Proficient in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS.

• Experience collaborating directly with OSATs and substrate vendors.

• Familiarity with packaging qualification and testing methodologies.

• The candidate must qualify as a “U.S. person” as defined by ITAR or be otherwise eligible for a federally issued export control license.

• Nice to Have: Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates).

• Nice to Have: Background in high-speed digital or mixed-signal SoCs.

• Nice to Have: Knowledge of aerospace, space, or high-reliability electronics.

🏝️ Benefits

• Reasonable accommodation is available as part of the employment application or interview process.

• Equal Opportunity Employer.