Principal FW/SW Engineer

This is a fully remote position, open to applicants in Canada.

📋 Description

• Take ownership of the embedded firmware stack, encompassing hardware abstraction, device drivers, management interfaces, diagnostics, and customer-facing APIs.

• Develop firmware for adaptive equalization, gain control, calibration, link training, PLL/CDR feedback, thermal management, and device telemetry.

• Design control algorithms, state machines, and tuning flows for analog and high-speed interfaces, accounting for variations in process, voltage, and temperature.

• Establish software quality gates, validation criteria, and release practices from pre-silicon planning to production deployment.

• Troubleshoot firmware across Ethernet configurations, link states, and failure modes by tracing interactions among Layer 1 PHY, SERDES, FEC/PCS, MAC, retimer, and gearbox.

• Examine register accesses, embedded SDK behavior, link state machines, PHY telemetry, logs, and real-hardware measurements to determine root causes and implement fixes.

• Collaborate with system validation to create test plans, automate characterization processes, and validate firmware across corner cases and product configurations.

• Assist with customer bring-up, field issue assessment, and ensure deployment readiness in coordination with applications, platform, and silicon teams.

• Set the technical direction and lead discussions on architecture and design trade-offs.

• Act as a technical authority for mixed-signal firmware, analog control behavior, Ethernet physical-layer debugging, and hardware/software integration.

• Oversee design reviews, implementation, code reviews, and complex debugging tasks across firmware, analog, silicon, systems, validation, and applications teams.

• Mentor engineers and contribute to team development through recruiting, onboarding, and technical training.

⛳️ Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related discipline.

• 8–12 years of experience in developing embedded firmware or software for resource-constrained systems, with a focus on ownership from architecture to production.

• Proficient in embedded C/C++ with a thorough understanding of microcontroller architecture, memory-mapped peripherals, interrupt handling, and bare-metal firmware.

• Practical experience with Ethernet or high-speed connectivity devices, such as Layer 1 PHYs, SERDES, retimers, gearboxes, NICs, switches, or similar systems.

• Strong grasp of physical-layer behavior, link state machines, register-level debugging, and hardware/software integration.

• Experience with feedback systems, adaptive algorithms, calibration, or tuning of analog or mixed-signal subsystems.

• Familiarity with Microsoft-based development environments and Linux command-line tools, including GCC or Clang, Make, Bash, GDB, and Git.

• Excellent written and verbal communication skills, systematic debugging capabilities, and the ability to thrive in a fast-paced, ambiguous environment.

• Preferred: Master’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field.

• Preferred: Python experience for test automation, debugging tools, data analysis, or lab workflows; hands-on experience with Jenkins and CI/CD infrastructure.

• Preferred: Knowledge of mixed-signal systems and analog signal paths, including ADC/DAC interfaces, sensor readout, transimpedance amplifiers, transmit drivers, CTLE/DFE equalization, CDR/PLL circuits, or thermal control.

• Preferred: Experience with retimer or gearbox firmware, SDK/API development, optical modules or pluggable optics, high-speed copper connectivity, Ethernet PHY subsystems, FEC, PMA, or signal integrity analysis.

• Preferred: Proficient in using oscilloscopes, BERTs, logic analyzers, and other lab equipment; knowledge of FPGA emulation, pre-silicon validation, RTOS, device drivers, coroutines, mentoring, or recruiting.

🏝️ Benefits

• Discretionary bonus.

• Incentives.

• Comprehensive benefits package.

• Occasional travel to Astera Labs’ San Jose headquarters, approximately twice per year.