Principal Embedded Firmware Engineer – AI/HPC Networking Silicon

This is a fully remote position, open to applicants in United States.

📋 Description

• Design and implement bare-metal C firmware on a RISC-V management core.

• Provision, initiate, and oversee arrays of on-chip acceleration engines.

• Take ownership of the secure firmware-loading pipeline, which includes flash image retrieval, hardware root-of-trust authentication, and verified image distribution via on-chip fan-out/DMA hardware.

• Develop per-engine bring-up, reset sequencing, and health validation utilizing control/status registers.

• Execute timeout and error handling while enforcing security invariants.

• Scale firmware distribution and bring-up processes across numerous engines and multiple dies.

• Facilitate runtime reboot and in-field firmware updates.

• Establish hardware/software contracts with ASIC/RTL teams through a datamodel-first workflow.

• Validate firmware using functional simulators like QEMU and through automated unit/integration tests.

• Set architectural standards, review designs and code, and mentor other engineers.

⛳️ Requirements

• Over 10 years of experience in embedded/firmware engineering.

• Proven history of software architecture and technical leadership.

• Proficiency in C; knowledge of C++ is advantageous.

• Competence in Python.

• Extensive experience with bare-metal firmware on constrained cores.

• Familiarity with manually managed local memories and low-level bring-up processes.

• Experience with secure boot/image authentication and the integration of hardware root-of-trust.

• Proficient in programming hardware CSRs and co-designing register-level interfaces with silicon teams.

• Capable of hands-on AI-assisted engineering and validating AI-generated outputs.

• Preference for experience with RISC-V firmware and toolchains.

• Familiarity with firmware orchestration for multi-core accelerator arrays is preferred.

• Knowledge of hardware root-of-trust ecosystems, such as Caliptra, and SHA-2/signature verification is preferred.

• Experience with code-generation toolchains like SystemRDL, Kaitai, and CMake, along with simulator-based co-verification is preferred.

• Understanding of Ultra Ethernet (UEC), UALink, and ESUN is preferred.

• Background in HPC/AI networking, RDMA, or libfabric is preferred.

🏝️ Benefits

• Equity, cash, and performance-based incentives.

• Comprehensive health, medical, dental, and vision coverage.

• Disability and life insurance options.

• Dependent care flexible spending account.

• Accidental injury insurance coverage.

• Pet insurance available.

• Generous paid holiday policy.

• 401(k) plan with company matching.

• Open Time Off (OTO) policy for regular full-time exempt employees.

• Sick leave provisions.

• Bonding leave available.

• Pregnancy disability leave offered.

• Flexible remote work environment.