
FPGA Developer, Digital Signal Processing
Posted Jul 28

Posted Jul 28
This is a fully remote position, open to applicants in United States.
• Design and implementation of HDL.
• Development of HDL designs using VHDL.
• Creation of well-structured, reusable, and thoroughly documented RTL modules for measurement signal chain applications.
• Conducting timing analysis and optimizing designs until timing closure is achieved.
• Designing and implementing digital signal processing algorithms, specifically IIR/FIR filters, decimation and resampling techniques, and frequency-domain analysis (FFT).
• Executing the DSP chain with an emphasis on precision, numerical stability, and resource efficiency on FPGA platforms.
• Designing and implementing high-speed I/O interfaces for ADCs, processor systems, real-time fieldbuses, and other peripherals.
• Collaborating with the Chief Architect on the design of I/O and SoC integration during the initial development phase.
• Creating testbenches for simulation, testing, and verification purposes.
• Documenting designs and verification outcomes to ensure reliable interfaces and adherence to specifications.
• Bachelor’s degree or equivalent in a STEM discipline.
• Minimum of 5 years of professional experience in FPGA design.
• Proven expertise in digital signal processing, including IIR/FIR filters, FFT, and resampling algorithms.
• Proficient in HDL design with VHDL.
• Strong grasp of timing constraints and optimization strategies for achieving timing closure.
• Experience with simulation tools like ModelSim and established verification methodologies.
• Skilled in using AMD Vivado.
• Business-fluent in either English (C1+) or German (C1+) with English at a B2 level.
• Preferred: Familiarity with real-time fieldbuses (EtherCAT, PROFINET).
• Experience with integrated SoCs (AXI/Avalon, EMIO, etc.).
• Background in soft processors (MicroBlaze, Nios, Embedded C).
• Knowledge of control engineering principles.
• Experience with high-speed methods for both serial and parallel I/O.
• Opportunity to influence the role from the outset: You will establish the FPGA development function within the organization and shape the design culture.
• Direct access to the Chief Architect and the founding team.
• Short communication pathways, clear decision-making, and an absence of organizational politics.
• Engaging technical challenges: Class-A power-quality measurement technology at the cutting edge of technical feasibility.
• Favorable market conditions: Data centers, the energy transition, and EU regulations provide substantial momentum in the power-quality sector.
• Competitive compensation package featuring a fixed salary along with variable components.
• Growth opportunities: As the function evolves, development into an FPGA/DSP team is explicitly planned, including I/O and fieldbus development.
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