
Staff Engineer, Inference Optimizations
Posted 3 days ago

Posted 3 days ago
This is a fully remote position, open to applicants in California.
β’ Direct the technical strategy focused on benchmarking and enhancing performance at the inference-engine and GPU-kernel levels.
β’ Address intricate performance challenges related to attention layers, memory management, precision control, and parallel processing across multi-node GPU clusters.
β’ Apply optimization methods for generative AI inference tasks.
β’ Enhance batch-size performance utilizing AMD's AITER library, and optimize CK or ASK kernels for FP8/BF16.
β’ Recognize kernel-fusion possibilities within Transformer-block layers, including FlashAttention and RMS Norm.
β’ Optimize expert-gateway router kernels for Mixture of Experts (MoE) models such as Qwen3-235B, DeepSeek V3, and GLM-5.
β’ Provide guidance on the procurement of NVIDIA/AMD hardware and software integration.
β’ Design and implement quantization methods, including FP8, INT8, and FP4.
β’ Lead code and design evaluations while raising the technical standards of the team.
β’ Collaborate with Product Management and Technical Program Managers (TPMs) to transform hardware limitations into marketable product features.
β’ Engage in and contribute to open-source AI initiatives while maintaining an active role in GPU infrastructure and model-performance communities.
β’ Over 5 years of experience in high-performance computing or AI infrastructure.
β’ Demonstrated success in resolving compute utilization and memory bandwidth challenges.
β’ Profound understanding of the Generative AI landscape, including LLM, VLM, and LMM model families.
β’ Practical experience with attention-layer optimizations and parallel processing in distributed GPU setups.
β’ In-depth knowledge of NVIDIA and AMD GPU architectures and software ecosystems, including CUDA and ROCm.
β’ Significant experience in integrating, building with, and contributing to open-source software initiatives.
β’ Exceptional skills in system design concerning low-level GPU programming, optimization, memory access patterns, and parallel execution.
β’ Experience in a technical leadership role, facilitating design and delivery through cross-functional collaboration.
β’ Comprehensive understanding of GPU architectures, encompassing SMs, warp scheduling, and Tensor Cores.
β’ Advanced proficiency in Triton or CUDA.
β’ Experience with contributions to the Triton compiler or development of custom CUDA kernels for a major LLM is preferred.
β’ Reimbursement for relevant conferences, training, and educational pursuits, in accordance with company policy.
β’ Flexible vacation policy.
β’ Opportunities for local team gatherings.
β’ Support for mental health and well-being.
β’ Eligibility for an annual bonus plan for non-sales positions.
β’ Eligible employees may receive equity compensation, including a new hire equity grant.
β’ Employee Stock Purchase Program available in participating countries.
β’ Access to professional development resources.
β’ Commitment to equal-opportunity employment.
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