Senior Test Development Engineer

This is a fully remote position, open to applicants in Taiwan.

📋 Description

• Take ownership of all TE activities for designated NPI programs, starting from first silicon to mass production release — encompassing test program development, characterization, and NPI flow execution.

• Collaborate closely with R&D, Product Engineering, and Operations teams to ensure NPI milestones are met leading up to Final Production Release.

• Create and enhance ATE test programs and hardware for production and characterization testing, primarily utilizing the S100 platform.

• Design and implement device characterization plans; gather parametric data across various process, voltage, and temperature conditions to set test limits and confirm test coverage.

• Develop T-FMEA for all new NPI programs; identify and document test coverage deficiencies with complete datasheet specification traceability prior to production release.

• Define and execute new testing strategies to enhance coverage, minimize test duration, and optimize test hardware architecture for high-volume production.

• Carry out CP1 functional screening and CP2 full parametric flows, including analog trim sequences; coordinate FT trim sequence validation according to specifications from the design team.

• Create probe and final test schematics and lead or participate in hardware review meetings; oversee probe card and FT fixture bring-up at OSAT from NPI through to mass production.

• Transfer and correlate test programs across alternative OSAT platforms; document correlation methodologies, site-to-site GR&R & Cpk sign-off criteria, and results from qualification lots.

• Assist in OTP programming qualification and post-program verification flows; provide initial ATE technical support for production challenges at both primary and alternative OSATs.

• Identify and pursue test time and cost reductions; document best practices and sustaining procedures for the long-term health of programs.

⛳️ Requirements

• Bachelor’s degree in Electrical, Electronic, or Computer Engineering (or an equivalent field).

• Over 5 years of experience in ATE test engineering within the semiconductor sector.

• Direct experience in ATE test program development from NPI to mass production on the S100 platform; backgrounds focused solely on sustaining will not suffice.

• Capability to interpret hardware schematics, datasheet parameters, and DFT documentation.

• Strong comprehension of analog/mixed-signal test methodologies, including trim, characterization, and parametric screening.

• Experience in designing multi-site test architectures: DUT board design, contact schemes, site-to-site correlation, and parallel testing efficiency.

• Practical experience with probe card and FT fixture bring-up.

• Exceptional problem-solving abilities and meticulous attention to detail; must be a collaborative team player.

• Proficient written and verbal communication skills; fluency in English is required; working proficiency in Mandarin is preferred.

🏝️ Benefits

• Health insurance.

• 401(k) matching.

• Flexible work hours.

• Paid time off.

• Professional development opportunities.