
Senior Post-Silicon Validation Engineer
Posted Sep 16

Posted Sep 16
This is a fully remote position, open to applicants in United States.
β’ Take ownership of the post-silicon validation strategy, including test planning, execution, coverage, and sign-off.
β’ Lead the initial silicon bring-up for power management, clock systems, debug interfaces, processor and memory subsystems, peripherals, and high-speed interfaces.
β’ Formulate the validation strategy and establish readiness criteria for product integration.
β’ Ensure the silicon, firmware, test infrastructure, and system interfaces are prepared for integration.
β’ Oversee system-level functional, performance, stress, and corner-case testing.
β’ Create the test and validation laboratory, encompassing equipment, infrastructure, test setups, and automated characterization and regression environments.
β’ Characterize RF chains, PLLs, ADCs/DACs, clocking, and power in collaboration with RF/analog and mixed-signal designers.
β’ Validate DSP and calibration algorithms on silicon, correlating measured performance with models and simulations.
β’ Collaborate with FPGA, firmware, RTL/DV, hardware, and systems teams to expedite bring-up and facilitate end-to-end validation.
β’ Drive cross-functional debugging across silicon, firmware, RTL, packaging, board, and system boundaries.
β’ Develop reusable automation for instrumentation control, data collection, analysis, regression, and reporting.
β’ Manage silicon issues from discovery through to root cause analysis, workaround identification, and resolution.
β’ BS/MS in Electrical Engineering, Computer Engineering, or a related field with equivalent experience.
β’ A minimum of 5 years of experience in post-silicon validation, SoC bring-up, silicon characterization, or related fields.
β’ Practical experience with bringing up intricate mixed-signal SoCs/ASICs and transitioning silicon into product/system integration.
β’ Proficient with lab test and measurement equipment such as oscilloscopes, spectrum/signal analyzers, vector signal generators, network analyzers, logic analyzers, power supplies, and related RF/mixed-signal instrumentation.
β’ Solid understanding of SoC architecture and a working knowledge of RF/analog and mixed-signal circuits.
β’ Strong hardware/software debugging skills across silicon, RTL, firmware, board, and systems.
β’ Experience in constructing silicon validation labs, test infrastructure, and automated measurement environments.
β’ Experience in validating DSP, calibration, or signal-processing functionalities in silicon.
β’ Proficient in Python/scripting for lab automation, instrumentation, and data analysis.
β’ Familiarity with embedded C/C++, JTAG, SPI, UART, and register-level debugging.
β’ Ability to lead cross-functional bring-up efforts while remaining actively involved in the lab.
β’ Must be a U.S. person as defined by ITAR or otherwise eligible for a federally issued export control license.
β’ Preferred: Experience with RF SoC and RF/analog characterization.
β’ Preferred: Experience in validating ADC/DAC, PLL, RF transceiver, or high-speed SerDes/JESD.
β’ Preferred: Experience with FPGA prototyping and RISC-V/ARM SoCs.
β’ Reasonable accommodations available as part of the employment application or interview process.
β’ Equal opportunity employment.
Sargent & Lundy
Willow Innovations, Inc.
Astrolab
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