
Senior DFT Engineer
Posted Oct 12

Posted Oct 12
This is a fully remote position, open to applicants in Ukraine.
• Take full responsibility for Design-for-Test (DFT) on customer System-on-Chips (SoCs) from start to finish.
• Develop and execute DFT architecture.
• Execute scan and Automatic Test Pattern Generation (ATPG) implementations.
• Implement memory Built-In Self-Test (BIST) and boundary scan techniques.
• Validate testing patterns effectively.
• Carry out DFT Design Rule Check (DRC) analysis and coverage debugging.
• Prepare and conduct gate-level simulations.
• Perform formal equivalence checking procedures.
• Automate DFT processes through scripting.
• Assist with the transition of production testing.
• Engage with customer SoCs for both ASIC and Customer-Owned Tooling (COT) design, as well as turnkey manufacturing services.
• Contribute throughout the entire product lifecycle, from architecture and RTL-to-GDSII implementation to silicon, packaging, and testing.
• Bachelor’s degree in Electrical Engineering from an accredited institution.
• At least 3 years of practical DFT experience is essential; preference is given to senior-level candidates.
• Proficient in scan, ATPG, at-speed testing, memory BIST, and I/O DFT methodologies.
• Experience with scan insertion and ATPG for various fault models, including stuck-at, transition-delay, bridging, and IDDQ; focus on test coverage enhancement.
• Familiarity with DFT DRC analysis and coverage debugging utilizing Synopsys DFT Compiler, TestMAX (TetraMAX), SpyGlass DFT, or comparable Siemens (Mentor) Tessent tools.
• Knowledge of Tessent MBIST.
• Strong understanding of JTAG standards IEEE 1149.1, IEEE 1149.6, and IEEE 1500 (formerly P1500).
• Practical experience in designing and implementing DFT features.
• Ownership of the complete DFT flow from conception to tape-out and into production.
• Setup and execution of gate-level simulations for pattern validation.
• Conduct formal equivalence checking.
• Proficient in Perl, Tcl, and UNIX scripting for process automation.
• Broader experience with Siemens Tessent tools (ScanPro / TestKompress, LBIST) beyond MBIST is preferred.
• Experience with advanced-node technologies (7nm and below) is advantageous.
• Familiarity with Python for flow automation is preferred.
• Competitive salary and comprehensive benefits package.
• Opportunities for professional development and career advancement.
• Work within a dynamic and collaborative team environment.
• Access to cutting-edge technology and innovative projects.
Sargent & Lundy
Willow Innovations, Inc.
Astrolab
Get handpicked remote jobs straight to your inbox weekly.