Advanced ASIC FPGA Verification Engineer

This is a fully remote position, open to applicants in Arizona.

📋 Description

• Define, design, verify, and document developments related to ASIC and/or FPGA.

• Establish architecture, system simulation, and detailed design strategies.

• Specify module interfaces along with all elements of device design and simulation.

• Develop test and simulation plans that set functional criteria.

• Validate test outcomes and evaluate performance metrics.

• Assess vendor capabilities and simulation tools as required.

• Engage in enhancing ASIC/FPGA organizational processes.

• Produce technical engineering products utilizing appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development lifecycle.

• Offer leadership and/or guidance to junior employees as necessary.

• Independently identify solutions and approaches.

• Contribute to significant programs and projects.

• Organize and carry out project tasks.

• Collaborate within a team setting with project leaders, engineering teams, internal workgroups, and external clients.

• Stay updated on technology trends and recognize opportunities for AI to promote continuous improvement and innovation.

⛳️ Requirements

• Bachelor’s degree in Electrical or Computer Engineering, or a related field in Science, Engineering, Technology, or Mathematics, along with 5+ years of relevant experience; or a Master’s degree with 3 years of relevant experience.

• Capability to obtain a U.S. Department of Defense TS/SCI security clearance within a reasonable timeframe from the date of hire.

• Must meet eligibility criteria for access to classified information.

• U.S. citizenship is required.

• Extensive experience with RTL simulation tools such as Siemens Mentor Graphics Questa or Modelsim, or equivalent, in a Linux environment.

• Deep understanding of SystemVerilog object-oriented programming and UVM.

• Familiarity with UVM testbench architectures.

• Experience in utilizing and developing UVM agents and bus functional models.

• Knowledge of coverage, cover classes, and cover points.

• Experience with predictive testbench components, functional coverage, and assertions.

• Proficient in constrained random testing.

• Experience with the Register Abstraction Layer.

• Familiarity with requirements-based verification, requirement tracing, and verification strategies.

• Proficient in Linux shell scripts, TCL, and Python.

• Knowledge of Formal Verification tools, code coverage, and the process of writing waivers.

• Familiarity with QVIP.

• Experience in developing UVM testbenches for Xilinx devices utilizing Xilinx IP and SoCs.

• Understanding of AXI protocols, PCIe, Space Wire, and Ethernet interfaces.

• Knowledge of DSP functions and common components in signal processing.

• Familiarity with debugging FPGA/ASIC hardware and supporting HW/SW integration.

• Acquainted with continuous integration features of GitLab.

• Strong grasp of ASIC/FPGA engineering concepts, principles, and theories.

• Expertise in ASIC/FPGA design principles and processes.

• Proficient in Microsoft Office applications.

• Excellent written and verbal communication skills.

• Ability to think creatively and manage multiple tasks effectively.

• Strong skills in conveying issues, impacts, and corrective actions.

• Solid understanding of embedded micro-processing systems, FPGA design and verification using VHDL, as well as digital circuit analysis and design.

• Experience in designing high-speed interfaces and intricate memory designs.

🏝️ Benefits

• Sign-on bonus available.

• Opportunities for continuous learning and development.

• Research-focused work alongside award-winning teams.

• Flexible work schedules with the option of every other Friday off (9/80 schedule).

• 401k matching.

• Flexible time off.

• Paid parental leave.

• Comprehensive healthcare benefits.

• Health & wellness programs.

• Access to employee resource and social groups.

• Flexible work environment.