
Senior FPGA Verification Engineer
Posted May 25

Posted May 25
This is a fully remote position, open to applicants in Turkey.
• Design and create ASIC/FPGA test benches.
• Develop test cases and execute simulations to ensure the functionality of ASIC/FPGA code.
• Generate and conduct testing on target hardware as part of post-silicon validation or within an integrated test environment (Hardware in the Loop).
• Gather functional and code coverage metrics.
• Validate and confirm ASIC/FPGA requirements.
• Assist in troubleshooting ASIC/FPGA design and/or testing concerns.
• Prepare documentation for peer reviews and significant program design evaluations.
• Over 5 years of experience with SystemVerilog Universal Verification Methodology (UVM), Pyuvm, or a similar verification methodology.
• Proficient in COCOTB and Python-based HDL simulations.
• Skilled in executing ASIC/FPGA simulations using QuestaSim, VCS, Riviero-Pro, or Verilator.
• Experienced in collecting coverage metrics for ASIC/FPGA.
• Competent in defining test plans, generating test cases, and creating testbench components.
• Proficient in writing VHDL, Verilog, or SystemVerilog code for ASIC/FPGA design.
• Experience in Python scripting, simulations, and tool development.
• Unlimited PTO - Vacation, Sick, Personal, and Bereavement.
• Paid Parental and Adoptive Leave.
• Medical, Dental, and Vision Insurance.
• Tax Advantage Accounts (HSA/FSA).
• Employer Paid Short and Long Term Disability, Basic Life, AD&D.
• Additional Benefit Options Including Voluntary Life and Emergency Medical Transport.
• EAP Program.
• Retirement Savings Plan - 401k with Company Match.
• Equity Grants in the Company.
TechBiz Global
ALTEN
Seekerh
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