
ASIC Verification Engineer
Posted May 25

Posted May 25
This is a fully remote position, open to applicants in Costa Rica.
β’ Contribute to the creation of UVM environments for the verification of RTL at block, unit, and SoC levels.
β’ Develop and execute tests in alignment with verification plans.
β’ Enhance the testbench for both functional and code coverage; gather and evaluate coverage metrics.
β’ Conduct formal verification of block level RTL.
β’ Engage in post-silicon verification activities.
β’ Master's Degree in Computer Engineering, Computer Science, or Electrical Engineering.
β’ Proven track record of achieving first-pass success in ASIC and Systems.
β’ Proficient in reading, writing, and speaking English at a professional level.
β’ Minimum of 3 years of post-college experience in verification.
β’ Over 3 years of post-college experience in one or more scripting languages (TCL, Python, Perl, Shell-scripting).
β’ At least 3 years of post-college experience validating complex SoCs with multiple clock and reset domains.
β’ Familiarity with UVM-based test bench development.
β’ Bachelor's Degree in Computer Engineering, Computer Science, or Electrical Engineering.
β’ Performance-based incentives, including an annual bonus or sales incentives.
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