
Senior NPI Test Engineer
Posted Jun 3

Posted Jun 3
This is a fully remote position, open to applicants in Taiwan.
• Design and execute testing strategies for intricate mixed-signal SiGe products from their conception to production maturity.
• Spearhead the creation of innovative testing methodologies for high-speed SerDes, CDRs, and signal conditioning products.
• Contribute to DFT/testability requirements within IC architecture by applying established standards and leading practices.
• Develop and implement cutting-edge testing techniques for products functioning at data rates exceeding 200Gbps.
• Create reusable test intellectual property, libraries, and frameworks to expedite new product introduction (NPI) cycles across various product families.
• Conduct technical risk assessments and devise mitigation strategies to enhance test coverage and quality.
• Represent test engineering during product architecture reviews and gate meetings.
• Collaborate with IC design teams from the initial concept stage to ensure optimal test coverage and manufacturability.
• Lead test readiness reviews with stakeholders while providing strategic recommendations.
• Partner with Product Engineering to define characterization strategies and correlation methodologies.
• Engage with customer quality teams regarding test specifications and coverage requirements.
• Design and implement testing solutions that meet test time objectives for complex mixed-signal devices.
• Promote continuous improvement initiatives aimed at reducing NPI cycle time by 10-20%.
• Investigate and apply next-generation ATE capabilities and measurement techniques.
• Develop proprietary testing methods that offer a competitive edge in terms of cost and quality.
• Lead the evaluation and adoption of new test platforms, instrumentation, and methodologies.
• Assess and implement AI/ML techniques to enhance yield and optimize testing processes.
• Ensure the seamless transfer of test solutions to high-volume OSATs, achieving over 99% first-pass success.
• Drive initiatives for test cost reduction, delivering improvements year after year.
• Establish and monitor key performance indicators (KPIs) for test effectiveness, efficiency, and quality.
• Mentor junior engineers, nurturing the next generation of test leaders.
• Create and maintain detailed documentation and training materials for comprehensive test methodologies.
• Build strategic relationships with test partners to influence platform development.
• Cultivate a culture of innovation and continuous learning within the test organization.
• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related discipline.
• Over 8 years of progressive experience in semiconductor test engineering.
• At least 5 years specifically focused on mixed-signal/RF test development.
• Expert-level proficiency with the Advantest V93000 platform (SmarTest 7/8).
• Advanced programming skills in C/C++, Python, and TCL.
• Comprehensive understanding of high-speed signal integrity, jitter analysis, and bit error rate (BER) testing.
• Expertise in analog/mixed-signal design for test (DFT) techniques including BIST, scan, and boundary scan.
• Proficient in RF/microwave testing techniques beyond 40GHz.
• Health insurance
• 401(k) matching
• Paid time off
• Professional development opportunities
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